The research team has co-designed a high-density optical transmitter chip based on optoelectronic fusion, and successfully conducted optoelectronic transmission tests to validate the electro-optical conversion rate, high-capacity transmission capability, and energy performance of this silicon-based optoelectronic integrated chip. The results, titled "16-channel photonic-electric co-designed silicon transmitter with ultra-low power consumption," will be published in the journal Photonics Research in February 2023.
The integration and co-design of optoelectronic chips integrates silicon-based optoelectronics and high-speed interconnect integration technologies, and has significant application prospects in next-generation data centers, high-performance computing, and other venues. Among them, the realization of low-power high-density optoelectronic integration is the key to promote the real application and landing of high-speed photoelectric interconnect technology. In order to further optimize the energy efficiency and improve the integration, the research team co-designed the electro-optical modulator chip and special driving circuit based on the commercial silicon optical process and the standard CMOS process, and constructed the prototype of optical transmitter that matches each other. In the co-design, the bias voltage and drive amplitude requirements of the silicon-based electro-optical modulator chip are further reduced, so as to realize the multi-channel integration of the silicon-based Mach-Zehnder modulator and the driver chip by using direct coupling, which reduces the power consumption and improves the integration density of the transmitter at the same time. In the design of the electrochip, an innovative drive architecture combining distributed amplification and push-pull is adopted, and a newly designed 2-tap feed-forward equalization (FFE) technology is introduced, which realizes the expansion of bandwidth at the cost of very low power consumption.
Fig. 1. (a) Structure diagram of the optoelectronic fusion integrated transmitter; (b) Physical diagram of the 16-channel silicon optical chip; (c) Physical diagram of the 8-channel driver chip
Figure 1(a) shows a 16-channel optoelectronic integrated transmitter, which includes a co-designed 16-channel silicon-optical Mach-Zehnder modulator chip. (1b) and two 8-channel driver chips (1c), they are directly integrated by means of gold wire bonding. The modulator and the driver chip bandwidth is close to 30GHz, and a drive output voltage of 56Gb/s and an electro-optical conversion of 50Gb/s are realized. As shown in Figure 2, the power consumption is only 267mW, and the corresponding energy consumption is 5.35pJ/bit, which reaches the current international leading level.
Fig. 2 Optical integrated transmitter test eye diagram
The co-first and corresponding authors of the paper are Dr. Jingbo Shi, Associate Researcher of the Center, Dr. Ming Jin, Ph.D. graduate of the class of 2017, and Prof. Xingjun Wang of the Center and Researcher Nan Qi of the Institute of Semiconductors, Chinese Academy of Sciences, as co-corresponding authors. Key collaborators include Dr. Hao-Wen Shu, Dr. RuiXuan Chen, Dr. YuanSheng Tao, Ph.D. student ChangHao Han, graduate student Tao Yang from College of Engineering, Peking University, graduate student Han Liu from Institute of Semiconductors, Chinese Academy of Sciences, and Associate Researcher FengHer Yang from Yangtze River Delta Institute of Photonics Science, Peking University. The above research was funded by the National Key Research and Development Program of China. This work was done by the State Key Laboratory of Regional Optical Fiber Communication Network and Novel Optical Communication System, School of Electronics, Peking University, as the first unit.
Link to the original paper:
https://www.researching.cn/articles/OJ2b5098a6e08a5d7e
