Recently, the research group published a paper titled "Multifunctional Mixed Analog/Digital Signal Processor Based on Integrated Photonics" in the journal Opto-Electronic Science. The study reports the latest advancements in multifunctional and highly reconfigurable monolithic signal processing systems.
Optical signal processing offers a more efficient and faster solution for modern applications, ranging from digital optical communications to analog microwave control. Coupled with advancements in integrated photonics, it demonstrates the potential for high scalability and flexibility. To fully leverage the advantages of integrated photonics, developing a highly versatile and high-performance chip-level architecture remains a key objective. An ideal architecture should be capable of loading digital and analog information, supporting both coherent and incoherent signal processing, maintaining a compact structure, and enabling functionalities across multiple domains.
In traditional solutions, integrated photonic systems are typically designed for specific tasks, lacking the ability to perform general-purpose processing across diverse application scenarios. This work proposes a multifunctional and highly reconfigurable monolithic signal processing system, with in-depth analyses conducted at the device, system, and application levels. The system integrates various active and passive components in a compact and efficient manner on a silicon-on-insulator (SOI) platform.
Specifically, the system comprises integrated high-speed electro-optic modulators and a cascaded microring-delay line structure, enabling multi-dimensional optical control such as high-speed information loading, wavelength selection, amplitude modulation, and delay adjustment. This architecture demonstrates strong adaptability across different application scenarios. With suitable configuration schemes, the on-chip processor can simultaneously support the loading and processing of both analog and digital signals. A single chip is capable of performing three distinct tasks across multiple mainstream fields, including optical computing, microwave photonics, and optical communications.
The results show that this system combines the exceptional application-specific performance of ASPIC architectures with the flexibility and reconfigurability of FPPGA architectures. This synergy provides a new approach to building multifunctional on-chip information processing systems.
The first author of the paper is Wu Yichen, a Ph.D. student at the School of Electronics, Peking University. The corresponding authors are Professor Wang Xingjun, Researcher Shu Haowen, Associate Researcher Bai Bowen from Peking University, and Associate Professor Li Tiantian from the School of Electronic Engineering, Xi’an University of Posts and Telecommunications. Major collaborators include postdoctoral researcher Shen Bitao, former doctoral graduate Tao Yuansheng, and graduate students Yang Qipeng, Zhang Xuguang, Tao Zihan, Xing Luwen, as well as Assistant Researcher Ge Zhangfeng from the Yangtze Delta Region Institute of Optoelectronics. This research was supported by the National Key R&D Program and the National Natural Science Foundation of China.
Link to the original paper：https://www.oejournal.org//article/doi/10.29026/oes.2024.240012
